ALM_MATCH=00, DST_EN=0, SWR=0, CLKOUT=00, TIMER_STB_MASK=0, FINEEN=0
RTC Control Register
FINEEN | Fine compensation enable bit 0 (0): Fine compensation is disabled 1 (1): Fine compensation is enabled. |
COMP_EN | no description available |
ALM_MATCH | Alarm Match bits. 0 (00): Only Seconds, Minutes, and Hours matched. 1 (01): Only Seconds, Minutes, Hours, and Days matched. 2 (10): Only Seconds, Minutes, Hours, Days, and Months matched. |
TIMER_STB_MASK | Sampling timer clocks mask 0 (0): Sampling clocks are not gated when in standby mode 1 (1): Sampling clocks are gated in standby mode |
DST_EN | Daylight Saving Enable. 0 (0): Disabled. Daylight saving changes are not applied. Daylight saving registers can be modified. 1 (1): Enabled. Daylight saving changes are applied. |
SWR | Software Reset bit. 0 (0): Software Reset cleared. 1 (1): Software Reset asserted. |
CLKOUT | RTC Clock Output Selection. 0 (00): No Output Clock 1 (01): Fine 1 Hz Clock 2 (10): 32.768 kHz Clock 3 (11): Coarse 1 Hz Clock |